The designed neuron is implemented in 55nm bulk CMOS technology with an area of 400 µm ² that consumes about We present circuit post-layout simulation results and demonstrate the circuit’s ability to produce biologically plausible neural dynamics with compact designs, and compare the energy consumption and stability with published state-of-the-art neuron circuits. The circuit is capable of obtaining precise firing frequencies by biasing the body voltages of critical PMOS transistors, which make the circuit usable for frequency coding Spiking Neural Network (SNN). Body-biased transistors are as well employed as voltage-controlled resistors to control the current flowing through the membrane capacitance. A second-order low-pass filter, using the property of energy storage in capacitors, is used to reset the membrane potential and implement firing frequency adaption mechanism. The proposed neuron employs body-biased method to increase charging current into the membrane capacitors for compensating the extra leakage current in the subthreshold region. This paper presents a body-biased silicon neuron circuit which is capable of operating at ultra-low-voltage supplies and achieves a stable firing frequency. It comprises a biomimetic soma circuit and 256 synapse circuits, along with their learning circuitries. The mixed-signal chip is designed in a Taiwan Manufacturing Semiconductor Company 250 nm complementary metal oxide semiconductor technology node. The task employs the adaptive spike-timing-dependent plasticity (STDP) learning rule, a bio-inspired learning rule introduced in a previous study. Next, to demonstrate that the oscillatory nature of the induced synaptic current has no unforeseen effects, the synapse circuit is employed in a spatiotemporal spike pattern detection task. This circuit is used to demonstrate the shunting inhibition phenomenon. The proposed circuit uses an oscillator-based resistor-type element at its output stage to incorporate this effect. This dependence is necessary to emulate shunting inhibition, which is thought to play important roles in information processing in the brain. They emulate the exponential decay profile of the synaptic current, but ignore the effect of the postsynaptic membrane potential on the synaptic current. Most contemporary low-power analog synapse circuits implement bioinspired “current-based” synaptic models suited for the implementation of single-compartment point neuron models. They are implemented in neuromorphic chips aiming to mimic the electrical activities of the neuronal networks in the brain and incorporate biomimetic soma and synapse circuits. Compartmental models are more bio-realistic. In this study, we present a conductance-based analog silicon synapse circuit suitable for the implementation of reduced or multi-compartment neuron models. Neuron, synapse, and learning circuits inspired by the brain comprise the key components of a neuromorphic chip.
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